Senior Digital Verification Engineer
Synopsys, Inc
há 43 dias

Job Description and Requirements

Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars.

Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything where devices are getting smarter, everything’s connected, and everything must be secure.

Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them.

Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing.

Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.

Founded in 1986, $2.7B+ Synopsys employs 12,000+ headquartered in Mountain View, California, located globally in over 25 countries with 113+ offices throughout North America, Europe, Japan, Asia, and India.

Synopsys is committed to fostering an environment that treats people with respect, honesty and professionalism. We’re also committed to partnering with the communities in which we work.

Every year, Synopsys reaches out to local communities with resources and employee leadership to support education, science programs and a variety of other activities.

Come and be part of a collaborative team environment that innovates and develops the latest IP solutions that enable the way the world designs. Join US!

Senior Digital Verification Engineer

Seeking a highly motivated and innovative digital verification engineer with strong theoretical and practical background in high-

speed protocols. Working as part of a highly experienced mixed-signal design team, the candidate will be involved in verifying current and next generation Backplane Ethernet, PCIe, SATA, USB 3 and MIPI SERDES products.

The position offers an excellent opportunity to work with an expert team of digital and mixed signal engineers responsible for delivering high-

end mixed-signal designs from specification development to performing functional and performance tests on the test-chips.

Main Duties :

  • Will be responsible for project leadership.
  • Mentor and guide junior engineers.
  • Perform architecture studies for complex verification environments.
  • Develop test plan from specification, design verification infrastructure and execute exhaustive logic verification.
  • Generate test benches, test cases and coverage metrics.
  • Write RTL code as required to support the verification environment development.
  • Perform RTL simulations and analyze results.
  • Perform gate-level simulations of circuits and analyze results.
  • Documentation of functionality, code, verification environments / plans, and procedures.
  • Generation of customer consumable application notes, white papers, etc. for selected topics.
  • Lead architecture discussions with verification teams across Synopsys.
  • Communicate with other Synopsys employees regarding customer technical support.
  • May communicate directly with customers regarding technical support.
  • Minimum Requirements :

  • Requires a degree in Engineering or Applied Science (or equivalent) and 5 years working experience in a related field.
  • Must have verification architecture development experience
  • Must have solid track record on VMM / UVM / OVM methodologies
  • Good organization and communication skills for interacting between different design groups and customer support teams
  • Increva-se
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