Senior ASIC Digital Verification Engineer
há 2 dias

and Requirements

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence.

The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security.

If you share our passion for innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoC faster. We offer the world’s broadest portfolio of silicon IP predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors.

All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications.

And get differentiated products to market quickly with reduced risk.

ASIC Digital Verification Engineer

Synopsys is seeking a creative, ambitious and talented engineer to fill a design and verification role in Porto, Portugal.

The environment presents stimulating, challenging and rewarding work within an excellent work environment with positive career development opportunities.

The successful candidates will work on product development for PCIe Controllers or similar protocols. As these designs are part of the DesignWare portfolio it presents the opportunity for the successful candidate to have their work used in many of the leading products that are developed by Synopsys customers.

We develop best in class designs using the latest best practice in verification to ensure their quality and we need the right people to keep making this happen.

As a worldwide organization there is sometimes short term travel required.

Key Qualifications

  • MSc or PhD in electronic engineering or computer science
  • 6+ years of relevant experience
  • ASIC verification skills using SV / UVM / VMM
  • Deep knowledge of IC design flows
  • A successful track record in project work
  • Good problem-solving skills
  • Good English communication skills
  • Preferred Experience

  • Design experience in SV / Verilog / VHDL
  • Exposure to Unix, Perl and TCL scripting
  • Exposure to synthesis and static timing, Lint, CDC, Formal checking flow
  • Experience in producing high-quality technical documentation
  • Ability to technically lead small teams of size 3 to 6
  • Knowledge of one or more of protocols : AMBA (AXI, CHI) / SD / eMMC / DDR / PCIe / Ethernet / USB / MIPI
  • Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.


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