Senior ASIC Digital Design Engineer
Synopsys, Inc
PORTUGAL - Portugal
há 3 dias

Job Description and Requirements

Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars.

Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything where devices are getting smarter, everything’s connected, and everything must be secure.

Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them.

Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing.

Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.

Synopsys is committed to fostering an environment that treats people with respect, honesty, and professionalism. We’re also committed to partnering with the communities in which we work.

Every year, Synopsys reaches out to local communities with resources and employee leadership to support education, science programs and a variety of other activities.

Come and be part of a collaborative team environment that innovates and develops the latest IP solutions that enable the way the world designs. Join US!

  • Job Description and Requirements
  • Seeking a highly motivated and innovative digital design or verification engineer with strong theoretical and practical background in high-

    speed data recovery circuits. Working as part of a highly experienced mixed-signal design team, the candidate will be involved in verifying current and next generation USB / PCIe / DPHY / CDPHY / MPHY / DP / HDMI products (up to 13.

    5Gbps). The position offers an excellent opportunity to work with an expert team of digital and mixed signal engineers responsible for delivering high-

    end mixed-signal designs from specification development to performing functional and performance tests on the test-chips.

    Main duties might include :

  • Review SerDes standards and architecture documents to develop analog sub-block specifications.
  • Identify and refine circuit implementations to achieve optimal power, area and performance targets.
  • Propose design and verification strategies that efficiently use simulator features to ensure highest quality design.
  • Participate in complex block and / or chip planning and architecture studies
  • Participate in the implementation of mixed-signal blocks using Verilog
  • Participate in the development of verification environments using top of the edge methodologies : System Verilog, VMM and UVM
  • Perform RTL and gate-level simulations of circuits, interpret the results and optimize the design until the predetermined functionality and timing is satisfied
  • Perform mixed signal simulations (Analog + Digital)
  • Work towards improving efficiency in design procedures and methodologies
  • Documentation of design and verification environments / plans and overall procedures
  • Other related duties as assigned by the upper manager
  • May participate in evaluation and troubleshooting of digital and mixed signal circuits.
  • Development opportunities :

  • Represents the organization on business unit and / or company-wide projects
  • Performs in project leadership role
  • Guides more junior peers with aspects of their job. Frequently networks with senior internal and external personnel in own area of expertise.
  • Take an active role in moving logic from analog world to digital world
  • Take an active role in implementing new digital blocks or creating verification testcases
  • Take an active role in the definition of new flows

  • Read technical papers and related material to keep abreast of industry progress
  • Write patents for any inventions
  • Minimum Requirements :

  • Typically requires a minimum of 8+ years of related experience
  • Solid understanding of digital / mixed signal verification flows and SOC integration challenges.
  • Experience in Verilog / VHDL. Knowledge of SystemVerilog or VMM or OVM or UVM would be advantageous
  • Experience in producing high-quality technical documentation
  • A successful track record in project work
  • Communicate effectively with other team members
  • Organizational skills
  • Willingness to learn new things
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